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Download PDF by John G. Webster (Editor) : 13.Computer-Aided Design of Integrated Circuits

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1990, pp. 52–57. 5. S. J. Friedman and K. J. Spowit, Finding the optimal variable ordering for binary decision diagrams, Proc. 24th ACM/IEEE Des. Autom. , 1987, pp. 348–356. 6. M. Fujita, H. Fujisawa, and N. Kawato, Evaluation and implementation of boolean comparison method based on binary decision diagrams, Proc. IEEE Int. Conf. -Aided Des. (ICCAD ’88), 1988, pp. 6–9. 7. N. Ishiura, H. Sawada, and S. Yajima, Minimization of binary decision diagrams based on exchanges of variables, Proc. IEEE Int.

R. Bowden, The modern fault dictionary, Proc. Int. , 1985, pp. 696–702. 28. V. Ratford and P. Keating, Integrating guided probe and fault dictionary: An enhanced diagnostic approach, Proc. Int. , 1986, pp. 304–311. 29. I. Pomeranz and S. M. Reddy, On the generation of small dictionaries for fault location, Proc. IEEE Int. Conf. -Aided Des. (ICCAD ’92), 1992, pp. 272–279. 30. P. G. Ryan, W. K. Fuchs, and I. Pomeranz, Fault dictionary compression and equivalence class computation for sequential circuits, Proc.

Autom. , 1987, pp. 69–76. DESIGN VERIFICATION AND FAULT DIAGNOSIS IN MANUFACTURING 38. E. M. Rudnick, W. K. Fuchs, and J. H. Patel, Diagnostic fault simulation of sequential circuits, Proc. Int. , 1992, pp. 178–186. 39. S. , Rapid diagnostic fault simulation at stuck-at faults in sequential circuits using compact lists, Proc. 32nd ACM/IEEE Des. Autom. , 1995, pp. 133–138. 40. S. Venkataraman, I. Hartanto, and W. K. Fuchs, Dynamic diagnosis of sequential circuits based on stuck-at faults, Proc. , 1996, pp.

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13.Computer-Aided Design of Integrated Circuits by John G. Webster (Editor)


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